1. Field
Embodiments of the invention relate to computer systems. In particular, embodiments of the invention relate to power management in computer systems.
2. Background Information
Many modern computer systems include both a main processor and one or more co-processors. Examples of suitable co-processors include, but are not limited to, math, graphics, audio, storage, and other bus-mastering input/output processors known in the arts.
The main processor and co-processor may perform processing in parallel. For example, the main processor may provide pointers, instructions, and data to the co-processor, such as, for example, by storing them in a first-in-first-out (FIFO) buffer, linear/circular queue, or other storage device. The co-processor may process the instructions and data in parallel with the processing performed by the main processor. The co-processor may then provide status information to the main processor. For example, the co-processor may have one or more status registers or memories through which it may provide completions, interrupts, failures, or other execution status information. There are various known ways in which the main processor and co-process may exchange status information.
Including one or more of such co-processors generally tends to improve system performance. For example, the co-processor may help to provide increased parallelism and/or help to offload tasks from the main processor. In some cases, the co-processor may be better suited at performing the offloaded tasks than the main processor.
However, in certain situations, the execution of the main processor may need to wait on the execution of the co-processor. For example, the main processor may need to wait for a dependent operation to complete within the co-processor in order to proceed. This may tend to be exacerbated when the main processor operates significantly faster than the co-processor. As another example, the work-around for some bugs may involve flushing the queue of the co-processor before taking further actions. In such example scenarios, the main processor may stall waiting for the co-processor to complete its tasks.
In certain advanced architectures, the stalled thread may halt, and wait for an interrupt from the co-processor to wake it up. In certain highly-threaded processor architectures, execution may potentially continue with other threads while waiting for the interrupt. However such event based synchronization is not always available. For example, legacy code may not support multi-threading or programmers may not take the extra effort to implement such multi-threading. As another example, certain processes, such as, for example, critical processes and/or processes that do not support re-entrancy, may need to continue until complete and may not allow for the possibility of introducing an interrupt. Still other environments simply do not allow for interruption and/or weren't designed for such threadedness. Accordingly, in some cases, the main processor may repeatedly execute a polling loop where the main processor may repeatedly execute a loop of instructions or otherwise await status of the co-processor for an indication that the work has been completed.
Such polling loops may occupy or busy the main processor. Some processors, such as, for example, those employed in laptops and other battery powered computing devices, may have multiple different operational power states, including faster, higher-powered states for rapid execution, and slower, lower-powered states to conserve power and/or reduce heat generation. The polling loops may be performed while the main processor is operating in a relatively high power state. In some instances the loops may potentially contribute to promotion of the main processor from a lower to a higher power state.
However, having the main processor in a higher power state during such polling loops may not significantly speed up execution, since the execution of the main processor may be waiting on the execution of the co-processor to continue. Faster polling of the co-processor for status may not cause the co-processor to complete processing any faster. Rather, the higher power state of the processor and/or the faster polling may unnecessarily waste power and produce heat.
Furthermore, laptops and other computer systems tend to have limited cooling capabilities that are shared by the main processor, co-processor, and other components. Excess heat produced by one component, such as, for example, a main processor, may reduce the amount of cooling available to other components, such as, for example, the co-processor, which may cause the other component to reach its thermal limit faster. This may potentially cause or result in a reduction in performance of the component or co-processor. Accordingly, in some situations, the excess heat produced by the main-processor during a tight polling loop waiting on the co-processor may result in heating and a corresponding reduction in performance of the co-processor on which the main processor is waiting. This may tend to increase the duration of the loop and compound the problem.
Power savings and/or heat reduction may potentially be achieved if the processor is placed in relatively lower power states during such loops.